1. Field of the Invention
The invention relates to an electronic security memory having a first input for a d.c. supply voltage, a second input for a control signal, and an output, as well as a transistor oscillator, feedback being provided via a transformer from a primary winding of said transformer to a first secondary winding, the primary winding being connected to the collector and the first secondary winding being connected to another electrode of said transistor, in such a way that a feedback loop is formed in order to produce an oscillation whose frequency is determined by a first capacitor which is connected in parallel with said primary winding, said memory being reset to zero by interruption of the supply voltage.
Such a security memory is mainly employed in railway signalling applications. It can be specifically employed in a processing unit in which it forms part of a logic arrangement which is adapted to control a service relay, which for example controls the closure of a level crossing by means of signals supplied by the detectors of an electronic treadle during the passage of a train.
2. Description of the Prior Art
Electronic security memories as defined in the opening paragraph and intended for such applications are known. Such a memory is described in French patent specification No. 1,281,318. It should be of the security type in terms of railway security, i.e. any defect or failure of the electronic circuit causes the output signal of the oscillator to disappear. Thus, after a breakdown it is not possible to obtain a signal which is more permissive than the normal state. The output of the memory is constituted by an a.c. signal. When the oscillator is in the unblocked state, this a.c. signal is present and by convention it is said that the content of the memory has the logic state "1", said logic state being "0", when the oscillator is blocked, i.e. when its output voltage (a.c. signal) is zero. Such a memory comprises two inputs. The d.c. supply voltage input serves to enable the memory, i.e. in the absence of the d.c. supply voltage the output state is necessarily "0", which state may be "1" or "0" when the d.c. supply voltage is present. The control input receives a control signal which is either a direct voltage or a zero voltage, said control signal representing the information to be stored. Such a memory operates sequentially, and its output state may differ for certain identical input states as a function of previous input states and of their transitions. The memory in accordance with French patent specification No. 1,281,318 is of the positive control type, i.e. it memorises that the direct voltage of the control signal has appeared, supplying a logic output signal equal to "1" during this appearance, the "1" state being subsequently maintained whatever is the waveform of the control signal between its two possible states, as defined in the foregoing. Resetting the memory to zero is subsequently effected by interrupting the supply voltage on the first input. The logic sequence to be realized is indicated in table I on page 3 of the previously mentioned Specification. The prior art memory described in the foregoing is used when the control signal is zero at rest and it becomes non-zero upon the occurrence of an external event. However, in certain cases, it is more interesting that the occurrence of said exterior event is accompanied by the decrease of disappearance of a signal which is normally present. This is for example how a negative directional treadle operates, which comprises two electronic transducers disposed near a railway line. At rest, these transducers are permanently energized with alternating currents, each of a predetermined frequency, by means of an oscillator, which promotes the security in a processor. This produces an alternating signal whose amplitude exceeds a certain threshold, and causes the processor to produce a d.c. signal for each transducer. The output signal of the processor in its turn controls a relay. When a wheel of a railway vehicle moves past each transducer, an inductive variation is produced in said transducer, as a result of which the amplitude of the alternating signal decreases below said threshold, which in the processor results in said d.c. signal passing through zero. It may be useful to memorise the disappearance of said d.c. signal in the processor. If this negative transition is to be stored with the aid of the positively controlled prior-art memory, it should be followed by a logic inverter, which complicates the electronic circuitry and increases the risk of defects, whilst said logic inverter itself should comply with railway security specifications, which increases its complexity in comparison with a normal logic inverter. In practice, it is not the actual state of the transducer whose change is to be stored in the processor, but the appearance or disappearance of a logic function of several logic variables, which may for example include the shielded or non-shielded state of the transducers, when reverting to the example of the negative directional treadle. In order to minimize the number of components it will be more advantageous, depending on the specific case, to use either the logic function itself or its complement, the state of the individual logic variables which are available in the logic array of the processor being given. This means that in certain cases the prior-art security memory is not optimized with respect to the logic function to be stored.
It is an object of the invention to mitigate said drawbacks of the prior art. To this end, the electronic security memory defined in the opening paragraph is characterized in that the memory comprises a power amplifier which is powered via said first input, whose input voltage is supplied by a second secondary winding of said transformer, and which comprises two outputs, one direct current output which is supplied to a second capacitor whose charging voltage, during operation of said oscillator, enables said oscillation to be sustained, and a second, alternating current, output which constitutes said output of the memory, said second input being connected to the collector of said transistor via a diode and supplying a d.c. control voltage having a value which is smaller than the value of the said charging voltage, said signal being capable of blocking said oscillator during its presence and in the absence of an oscillation, its disappearance causing the oscillator to be unblocked starting and maintaining an oscillation in the presence of said supply voltage.
In the case of a logic function of a plurality of variables to be stored, it may be more advantageous to employ a memory of the negative control type, whose control input receives the complement of the logic function considered rather than a memory with positive control in accordance with the prior-art, whose input receives the logic function itself, because it is easier to obtain the complement of said logic function than the function itself.